Full Report
An unprivileged Linux program can time a hardware interrupt to land in the gap between a processor sanitizing its branch predictor and the kernel using it, re-poisoning the predictor after the defense has run. MIT CSAIL researchers Daniël Trujillo and Mengjia Yan named the technique INTERRUPT INJECTION. On an AMD Zen 2 machine running Linux 6.14 with every default Spectre v2 mitigation on,
Analysis Summary
# Vulnerability: INTERRUPT INJECTION (TONTOU)
## CVE Details
- **CVE ID**: No specific CVE assigned for this technique as of August 6, 2026 (Utilizes **CVE-2023-20569** / Inception as part of the exploit chain).
- **CVSS Score**: N/A (Research phase; High severity potential due to arbitrary memory leakage).
- **CWE**: CWE-367 (Time-of-Check to Time-of-Use / TONTOU: Time-of-Neutralization to Time-of-Use).
## Affected Systems
- **Products**: Modern CPUs from AMD and Intel.
- **Versions**:
- **AMD**: Zen 2 architecture confirmed vulnerable (running Linux 6.14). Zen 4 showed no mispredictions in tests.
- **Intel**: Arrow Lake and Cascade Lake Refresh confirmed vulnerable to mispredictions.
- **Configurations**: Systems running Linux with standard Spectre v2 mitigations (eIBRS, Retpoline, Safe RET) enabled.
## Vulnerability Description
INTERRUPT INJECTION is a "Time-of-Neutralization to Time-of-Use" (TONTOU) flaw. It exploits a race condition where an unprivileged program times a hardware interrupt to fire precisely in the nanosecond-scale gap between a processor's defense (sanitizing the branch predictor) and the kernel's subsequent use of that predictor.
By landing an interrupt within this window—which can be as small as two instructions (six bytes) on Zen 2—the attacker can re-poison the predictor state before the kernel executes, effectively bypassing hardware and software Spectre v2 mitigations.
## Exploitation
- **Status**: PoC available (developed by MIT CSAIL researchers).
- **Complexity**: High (requires nanosecond precision, cache eviction of specific instructions, and sibling hyperthreading).
- **Attack Vector**: Local (unprivileged code execution required).
## Impact
- **Confidentiality**: High (Demonstrated leakage of arbitrary kernel memory at 5.47 bytes/sec; capable of reading `/etc/shadow`).
- **Integrity**: Low/None (Primary impact is information disclosure).
- **Availability**: None.
## Remediation
### Patches
- **AMD**: Reportedly developing/shipping a kernel patch. According to MIT, a fix has been integrated into recent Linux kernel updates, though specific commit IDs were not listed in the source.
- **Intel**: Currently does not consider a mitigation necessary, stating the technique is covered by existing "Branch History Injection" guidance.
### Workarounds
- Ensure all Spectre v2 mitigations are active (e.g., `spectre_v2=on`).
- Monitor for unconventional interrupt timing patterns (theoretical).
- Disable SMT (Simultaneous Multithreading) to close the cache-eviction side-channel used to widen the race window.
## Detection
- **Indicators of Compromise**: Difficult to detect via standard logs as it exploits hardware behavior. High-frequency, precisely timed interrupts may be visible in performance monitoring tools.
- **Detection Methods**: Check `/sys/devices/system/cpu/vulnerabilities/` for mitigation status, though existing documentation may not yet reflect "Interrupt Injection" specifically.
## References
- MIT CSAIL Research Paper: [https://people.csail.mit.edu/mengjia/data/2026.USENIX.TONTOU.pdf](https://people.csail.mit.edu/mengjia/data/2026.USENIX.TONTOU.pdf)
- Intel Security Guidance: [https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/branch-history-injection.html](https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/branch-history-injection.html)
- MIT CSAIL News: [https://www.csail.mit.edu/news/new-attack-slips-past-latest-defenses-built-your-computers-processor](https://www.csail.mit.edu/news/new-attack-slips-past-latest-defenses-built-your-computers-processor)